See also related work on in-circuit assertions and exceptions.

• Design validation

  Q. Wang, Y. Wong, Z. Que and W. Luk, Verifying Hardware Optimizations for Efficient Acceleration, International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART), 2022.

  N. Ng, N. Yoshida and W. Luk, Scalable Session Programming for Heterogeneous High-Performance Systems, SEFM Workshops, pp. 82-98, 2013.

  N. Ng, N. Yoshida, X. Niu, K.H. Tsoi and W. Luk, Session Types: Towards Safe and Fast Reconfigurable Programming, ACM SIGARCH Computer Architecture News, vol. 40, no.5, pp. 22-27, December 2012.

  K.W. Susanto and W. Luk, Automating Formal Verification of Customized Soft Processors, Proc. International Conference on Field-Programmable Technology, 2011.

  K.W. Susanto, T.J. Todman, J.G.F. Coutinho and W. Luk, Design Validation by Symbolic Simulation and Equivalence Checking: A Case Study in Memory Optimization for Image Manipulation, Proc. International Conference on Current Trends in Theory and Practice of Computer Science, 2009.

  S.W. McKeever and W. Luk, Provably-Correct Hardware Compilation Tools based on Pass Separation Techniques, Formal Aspects of Computing, vol. 18, no. 2, pp. 120-142, June 2006.

  S.W. McKeever, W. Luk and A. Derbyshire, Compiling Hardware Descriptions with Relative Placement Information for Parametrised Libraries, Proc. International Conference on Formal Methods in Computer-Aided Design, LNCS 2517, pp. 342-359, 2002.

  S.R. Guo and W. Luk, An Integrated System for Developing Regular Array Designs, Journal of Systems Architecture, vol. 47, no. 3-4, pp. 315-337, April 2001.

  J.W. O'Leary, G.M. Brown and W. Luk, Verified Compilation of Communicating Processes into Clocked Circuits, Formal Aspects of Computing, vol. 9, no. 5-6, pp. 537-559, 1998.

  J. He, G. Brown, W. Luk and J. O'Leary, Deriving Two-Phase Modules for a Multi-target Hardware Compiler, in Designing Correct Circuits, Springer Electronic Workshop in Computing series, 1996.

  W. Luk, A Declarative Approach to Incremental Custom Computing, Proc. International Synposium on Field-Programmable Custom Computing Machines, 1995.

  W. Luk, Systematic Serialisation of Array-based Architectures, Integration, the VLSI Journal, vol. 14, no. 3, pp. 333-360, February 1993.

  W. Luk and G. Brown, A systolic LRU Processor and its Top-down Development, Science of Computer Programming, vol. 15, no. 23, pp. 217-233, December 1990.