S. Yusuf, W. Luk, M. Sloman, N. Dulay, E.C. Lupu and G. Brown, Reconfigurable Architecture for Network Flow Analysis, IEEE Transactions on VLSI Systems, vol. 16, no. 1, pp. 57-65, January 2008.

T.K. Lee, S. Yusuf, W. Luk, M. Sloman, E. Lupu and N. Dulay, Compiling Policy Descriptions into Reconfigurable Firewall Processors, Proc. IEEE Symposium on Field-Programmable Custom Computing Machines, pp. 39-48, 2003.

S. Yusuf and W. Luk, Bitwise Optimised CAM for Network Intrusion Detection Systems, Proc. International Conference on Field Programmable Logic and Applications, pp. 444-449, 2005.

R.C.C. Cheung, N. Telle, W. Luk, and P.Y.K. Cheung, Customisable Elliptic Curve Cryptosystems, IEEE Transactions on VLSI Systems, vol. 13, no. 9, pp. 1048-1059, September 2005.

A. Le Masle, W. Luk, J. Eldredge and K. Carver, Parametric Encryption Hardware Design, Proc. International Symposium on Applied Reconfigurable Computing, LNCS 5992, pp. 68-79, 2010.

A. Le Masle, W. Luk and C.A. Moritz, Parametrized Hardware Architectures for the Lucas Primality Test, Proc. International Conference on Embedded Computer Systems: Architectures, MOdeling, and Simulation, 2011.

G.C.T. Chow, K. Eguro, W. Luk and P.H.W. Leong, A Karatsuba-based Montgomery Multiplier, Proc. International Conference on Field Programmable Logic and Applications, pp. 434-437, 2010.

R.C.C. Cheung, A. Brown, W. Luk and P.K.Y. Cheung, A Scalable Hardware Architecture for Prime Number Validation, Proc. International Conference on Field Programmable Technology, pp. 177-184, 2004.

O. Mencer, K.H. Tsoi, S. Craimer, T.J. Todman and W. Luk, CUBE: a 512-FPGA Cluster, Proc. Southern Programmable Logic Conference, 2009.

M. Kurek, I. Ilkos and W. Luk, Customizable Security-Aware Cache for FPGA-based Soft Processors, Proc. Southern Programmable Logic Conference, 2011.

K.W. Susanto and W. Luk, Automating Formal Verification of Customized Soft.Processors, Proc. International Conference on Field-Programmable Technology, 2011.

K.W. Susanto, T.J. Todman, J.G.F. Coutinho and W. Luk, Design Validation by Symbolic Simulation and Equivalence Checking: A Case Study in Memory Optimization for Image Manipulation, Proc. International Conference on Current Trends in Theory and Practice of Computer Science, 2009.

S.W. McKeever and W. Luk, Provably-Correct Hardware Compilation Tools based on Pass Separation Techniques, Formal Aspects of Computing, vol. 18, no. 2, pp. 120-142, June 2006.

S.W. McKeever, W. Luk and A. Derbyshire, Compiling Hardware Descriptions with Relative Placement Information for Parametrised Libraries, Proc. International Conference on Formal Methods in Computer-Aided Design, LNCS 2517, pp. 342-359, 2002.